KAIST

< Figure 1. (From left to right) KAIST Professor Kibum Kang, Dr. Minseung Gyeon, Ph.D. candidate Yeongyu Kim, and Professor Seungbum Hong; and, in the circles from left, Sungkyunkwan University Ph.D. candidate Ji Hoon Hong and Professor Sung Beom Cho. >

When the pathways through which electricity flows inside a semiconductor become blocked, device performance declines and power loss increases. A Korean research team has developed a new structure that could resolve this “electrical bottleneck” and, for the first time, directly confirmed that electric charges flow continuously without interruption. This achievement is expected to become a key technology for improving the performance and power efficiency of future semiconductors, including AI semiconductors and ultra-low-power semiconductors.

KAIST announced on July 13 that a research team led by Professor Seungbum Hong from the Department of Materials Science and Engineering, in collaboration with Professor Kibum Kang from the Department of Materials Science and Engineering at KAIST and Professor Sung Beom Cho’s research team at Sungkyunkwan University, has realized a new structure in which electricity flows without obstruction in a two-dimensional material—an ultrathin material only one or two atomic layers thick—that is attracting attention for next-generation semiconductor devices. The team also developed an analytical platform capable of directly observing this charge transport at the nanometer scale.

In semiconductors, contact resistance, which arises at the interface where a metal electrode meets a semiconductor, degrades performance and causes power loss. Especially as semiconductors continue to scale down, the influence of contact resistance becomes even greater, making it one of the most challenging technical bottlenecks in developing next-generation semiconductors.

< Figure 2. (AI-generated image) Conceptual diagram of the research explained by KAIST’s mascot character (Nubzuki) >

Instead of attaching a metal electrode on top of a semiconductor as in conventional approaches, the research team continuously formed semi-metallic and semiconducting regions within a single two-dimensional m

aterial. By creating a structure in which the two regions are naturally connected within the same material, the team demonstrated for the first time that current can flow across the boundary without being blocked.

Specifically, the team continuously implemented a semi-metallic region and a semiconducting region within a single thin film of platinum diselenide (PtSe₂), an atomically thin two-dimensional material. By realizing a monolithic structure, in which a single material is formed continuously without interruption, the team proposed a new structure that allows current to flow across the boundary without obstruction.

Using Atomic Force Microscopy (AFM), a microscope that uses a probe to measure surface and electrical properties down to the atomic level, the team directly visualized charge transport inside the thin film at the nanometer scale.

As a result, the team confirmed for the first time that, when current moved from the semi-metallic region to the semiconducting region, the flow continued naturally without an “electrical bottleneck,” such as a blockage or bending of the current path. This is the first experimental demonstration that a monolithic interface does not interfere with current flow.

Furthermore, the team verified device operation by applying an electric field to the semiconducting region. The results confirmed that current flow can be stably controlled in a metal–semiconductor junction structure, demonstrating the potential of the structure for next-generation electronic devices.

< Figure 3. The Research Infographic >

This study presents a source technology that can dramatically reduce contact resistance in next-generation semiconductor devices based on two-dimensional materials. It is expected to be widely applicable to the development of future semiconductor technologies, including AI semiconductors, ultra-low-power semiconductors, and next-generation logic semiconductors.

The study was co-first-authored by Yeongyu Kim, a Ph.D. candidate and Dr. Minseung Gyeon from the Department of Materials Science and Engineering at KAIST; and Ji Hoon Hong, a Ph.D. candidate at Sungkyunkwan University. The work was published in the July 2026 issue of Matter, an international journal in the field of materials science.

※ Paper title: Nanoscale imaging of charge transport across the semimetal-semiconductor interface in monolithic platinum diselenide

DOI:https://doi.org/10.1016/j.matt.2026.102873

This research was supported by the STEAM Research Program and the Nanomaterials Technology Development Program of the Ministry of Science and ICT and the National Research Foundation of Korea.